[I2C] The I2C-bus specification : 송수신

9 FORMATS WITH 7-BIT ADDRESSES

Data transfers follow the format shown in Fig.10. After the START condition (S), a slave address is sent. This address is 7 bits long followed by an eighth bit which is a data direction bit (R/W) - a ‘zero’ indicates a transmission (WRITE), a ‘one’ ndicates a request for data (READ). A data transfer is always terminated by a STOP condition (P) generated by the master. However, if a master still wishes to communicate on the bus, it can generate a repeated START condition (Sr) and address another slave without first generating a STOP condition. Various combinations of read/write formats are then possible within such a transfer

Possible data transfer formats are:

· Master-transmitter transmits to slave-receiver. The transfer direction is not changed (see Fig.11).

· Master reads slave immediately after first byte (see Fig.12). At the moment of the first acknowledge, the master- transmitter becomes a master- receiver and the slave-receiver becomes a slave-transmitter. This first acknowledge is still generated by the slave. The STOP condition is generated by the master, which has previously sent a not-acknowledge (A).

· Combined format (see Fig.13). During a change of direction within a transfer, the START condition and the slave address are both repeated, but with the R/W bit reversed. If a master receiver sends a repeated START condition, it has previously sent a not-acknowledge (A).

NOTES:

1. Combined formats can be used, for example, to control a serial memory. During the first data byte, the internal memory location has to be written. After the START condition and slave address is repeated, data can be transferred.

2. All decisions on auto-increment or decrement of previously accessed memory locations etc. are taken by the designer of the device.

3. Each byte is followed by an acknowledgment bit as indicated by the A or A blocks in the sequence.

4. I2C-bus compatible devices must reset their bus logic on receipt of a START or repeated START condition such that they all anticipate the sending of a slaveaddress, even if these START conditions are not positioned according to the proper format.

5. A START condition immediately followed by a STOP , condition (void message) is an illegal format.

위의 Fig11,12,13 의 형태로 데이터를 전송합니다.

-> 요약하면, DATA는 반드시 8bit 크기로 보내어진다. 그리고 Slave가 data를 다 수신하지 못했다면 slave는 SCL신호를 LOW로 유지함으로써 Data를 모두 전달 받을수가 있다. (그래서 신호선이 풀업저항설계가 되어있는 것.) //

[통신의 송수신 순서]

1. SDA,SCL 둘다 HIGH 상태인가?  - 그렇다면 Bus는 비어있다.

2. 시작비트를 보낸다. (SCL: : HIGH, SDA : LOW)

3. 7bit의 주소값을 보내고 1bit의 R/W를 보낸다.

4. ACK를 수신하기 위해서 SDA방향을 마스터기준으로 INPUT으로 변경하고 SCL만 출력한다 (클럭신호만 아웃)

5. ACk왔다면 실어보낼 데이터를 전송한다. (1byte)

6. ACK를 수신하기 위해서 SDA의 방향을 마스터기준으로 INPUT으로 또다시 변경하고 SCL만을 출력

7. 더이상 전송할 데이터가 없다면 SDA와 SCL을 HIGH상태로 변경시킨다.

8. 정지비트를 보낸다.

[인터넷에 있는 데이터 송수신 예제입니다. ] : southlife님의 블로그참조 http://southlife.tistory.com/49